Hey, so I’m basing a board off of the ELK-PI hat (thanks for all the hard work!), but when I was perusing the schematic I ran across a XC2C64A-7VQG44C connected between the RPI and the PCM3168A codec. Assumedly this is to control the timing/clock with high precision instead of relying on GPIO?
Regardless, I’m wondering what work I have to do to get the CPLD working in my design. Does ELK-OS flash the device in-system if I lift the Codec + CPLD design from the ELK-PI hat, or will I have to manually flash the device with source code from somewhere?
Found this thread, it mentions the CPLD device and associated code, but still doesn’t mention what flashes or how to flash the device.
https://forum2.elk.audio/t/is-the-cpld-code-available/231
Bump. @Stefano, you seemed to have expertise over on the other thread. Do you happen to have any insights? Thanks!
So to answer my own question the CPLD appears to be acting as a clock divider. The device needs to be flashed with an external programmer via JTAG. A link to the code/instructions can be found in the CPLD thread linked earlier (Thanks Stefano)!
Hi I am unable to find the link to the code/instructions can be found in the CPLD thread linked earlier